technical data rev. 00 dual j-k flip-flop with set and reset high-speed silicon-gate cmos the in74act109 is identical in pinout to the ls/als 109, hc/hct109. the in74act109 may be used as a level co nverter for interfacing ttl or nmos outputs to high speed cmos inputs. this device consists of two j-k flip-flops with ind ividual set, reset, and clock inputs. changes at the inputs are reflect ed at the outputs with the next low-to-high transition of the clock. both q to q outputs are available from each flip-flop. ? ttl/nmos compatible input levels ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 a; 0.1 a @ 25 c ? outputs source/sink 24 ma ordering information in74act109n plastic IN74ACT109D soic t a = -40 to 85 c for all packages in74act109 logic diagram pin 16=v cc pin 8 = gnd pin assignment function table inputs outputs set reset clock j k q q l h x x x h l h l x x x l h l l x x x h * h * h h l l l h h h h l toggle h h l h no change h h h h h l h h l x x no change x = don?t care * both outputs will remain high as long as set and reset are low, but the output states are unpredictable if set and reset go high simultaneously.
in74act109 rev. 00 maximum ratings * symbol parameter value unit v cc dc supply voltage (referenced to gnd) -0.5 to +7.0 v v in dc input voltage (referenced to gnd) -0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc supply current, v cc and gnd pins 50 ma p d power dissipation in still air, plastic dip+ soic pac kage+ 750 500 mw tstg storage temperature -65 to +150 c t l lead temperature, 1 mm from case for 10 seconds (plastic dip or soic package) 260 c * maximum ratings are those values beyond which damag e to the device may occur. functional operation should be restricted to the re commended operating conditions. +derating - plastic dip: - 10 mw/ c from 65 to 125 c soic package: : - 7 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 4.5 5.5 v v in , v out dc input voltage, output voltage (referenced to gn d) 0 v cc v t j junction temperature (pdip) 140 c t a operating temperature, all package types -40 +85 c i oh output current - high -24 ma i ol output current - low 24 ma t r , t f input rise and fall time * (except schmitt inputs) v cc =4.5 v v cc =5.5 v 0 0 10 8.0 ns/v * v in from 0.8 v to 2.0 v this device contains protection circuitry to guard against damage due to high static voltages or elect ric fields. however, precautions must be taken to avoid applica tions of any voltage higher than maximum rated volt ages to this high-impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
in74act109 rev. 00 dc electrical characteristics (voltages referenced to gnd) v cc guaranteed limits symbol parameter test conditions v 25 c -40 c to 85 c unit v ih minimum high-level input voltage v out =0.1 v or v cc -0.1 v 4.5 5.5 2.0 2.0 2.0 2.0 v v il maximum low - level input voltage v out =0.1 v or v cc -0.1 v 4.5 5.5 0.8 0.8 0.8 0.8 v v oh minimum high-level output voltage i out -50 a 4.5 5.5 4.4 5.4 4.4 5.4 v * v in =v ih or v il i oh =-24 ma i oh =-24 ma 4.5 5.5 3.86 4.86 3.76 4.76 v ol maximum low-level output voltage i out 50 a 4.5 5.5 0.1 0.1 0.1 0.1 v * v in =v ih or v il i ol =24 ma i ol =24 ma 4.5 5.5 0.36 0.36 0.44 0.44 i in maximum input leakage current v in =v cc or gnd 5.5 0.1 1.0 a ? i cct additional max i cc /input v in =v cc - 2.1 v 5.5 1.5 ma i old +minimum dynamic output current v old =1.65 v max 5.5 75 ma i ohd +minimum dynamic output current v ohd =3.85 v min 5.5 -75 ma i cc maximum quiescent supply current (per package) v in =v cc or gnd 5.5 4.0 40 a * all outputs loaded; thresholds on input associated with output under test. +maximum test duration 2.0 ms, one output loaded at a time.
in74act109 rev. 00 ac electrical characteristics (v cc =5.0 v 10%, c l =50pf,input t r =t f =3.0 ns) guaranteed limits symbol parameter 25 c -40 c to 85 c unit min max min max f max maximum clock frequency (figure 1) 145 125 mhz t plh propagation delay , clock to q or q (figure 1) 4.0 11.0 3.5 13.0 ns t phl propagation delay , clock to q or q (figure 1) 3.0 10.0 2.5 11.0 ns t plh propagation delay , set or reset to q or q (figur e 2) 2.5 9.5 2.0 10.5 ns t phl propagation delay , set or reset to q or q (figur e 2) 2.5 10.0 2.0 11.5 ns c in maximum input capacitance 4.5 4.5 pf typical @25 c,v cc =5.0 v c pd power dissipation capacitance 35 pf timing requirements (v cc =5.0 v 10%, c l =50pf, input t r =t f =3.0 ns) guaranteed limits symbol parameter 25 c -40 c to 85 c unit t su minimum setup time, j or k to clock (figure 3) 2.0 2.5 ns t h minimum hold time, clock to j or k (figure 3) 2.0 2.0 ns t w minimum pulse width, set, reset, clock (figures 1,2) 5.0 6.0 ns t rec minimum recovery time, set or reset to clock (figure 2) 0 0 ns
in74act109 rev. 00 figure 1. switching waveform figure 2. switching wa veform figure 3. switching waveform expanded logic diagram
in74act109 rev. 00 n suffix plastic dip (ms - 001bb) symbol min max a 18.67 19.69 b 6.1 7.11 c 5.33 d 0.36 0.56 f 1.14 1.78 gh j 0 10 k 2.92 3.81 notes: l 7.62 8.26 1. dimensions ?a?, ?b? do not include mold flash or pr otrusions. m 0.2 0.36 maximum mold flash or protrusions 0.25 mm (0.010 ) per side. n 0.38 d suffix soic (ms - 012ac) symbol min max a 9.8 10 b 3.8 4 c 1.35 1.75 d 0.33 0.51 f 0.4 1.27 gh j 0 8 notes: k 0.1 0.25 1. dimensions a and b do not include mold flash or pro trusion. m 0.19 0.25 2. maximum mold flash or protrusion 0.15 mm (0.006) pe r side p 5.8 6.2 for a; for b ? 0.25 mm (0.010) per side. r 0.25 0.5 5.72 2.54 7.62 1.27 dimension, mm dimension, mm a b h c k c m j f m p g d r x 45 seating plane 0.25 (0.010) m t -t- 1 16 8 9 l h m j a b f g d seating plane n k 0.25 (0.010) m t -t- c 1 16 8 9
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